- descriptor cache
- кэш-память дескриптора
Англо-русский словарь компьютерных и интернет терминов. 2013.
Англо-русский словарь компьютерных и интернет терминов. 2013.
Unreal mode — Unreal mode, also big real mode, huge real mode, or flat real mode, is a variant of real mode (PE=0), in which one or more data segment registers have been loaded with 32 bit addresses and limits. Contrary to its name, it is not a separate… … Wikipedia
LOADALL — is the common name for two different, undocumented machine instructions of Intel 80286 and Intel 80386 processors, which allow access to areas normally outside of the IA 32 API scope, like descriptor cache registers . The LOADALL for 286… … Wikipedia
ESDC — Extra Segment Descriptor Cache … Acronyms
SSDC — • Stack Segment Descriptor Cache • System Safety Development Center ( > IEEE Standard Dictionary ) … Acronyms
ESDC — Extra Segment Descriptor Cache … Acronyms von A bis Z
SSDC — [1] Stack Segment Descriptor Cache [2] System Safety Development Center ( > IEEE Standard Dictionary ) … Acronyms von A bis Z
CSDC — abbr. Circuit Switched Digital Capability abbr. Code Segment Descriptor Cache (register) (CS, Intel, CPU) acronym Circuit Switched Digital Capability … United dictionary of abbreviations and acronyms
DSDC — abbr. Data Segment Descriptor Cache (register) (DS, Intel, CPU) … United dictionary of abbreviations and acronyms
ESDC — abbr. Extra Segment Descriptor Cache (register) (ES, Intel, CPU) … United dictionary of abbreviations and acronyms
SSDC — abbr. Stack Segment Descriptor Cache (register) (SS, Intel, CPU) … United dictionary of abbreviations and acronyms
TSSDC — abbr. Task State Segment Descriptor Cache (CPU) … United dictionary of abbreviations and acronyms